Datacenter Trends

Microsoft, Google Join IT Majors in Backing Intel's CXL

Intel's launch of the CXL Consortium draws fresh battle lines in the interconnect wars.

If Intel's recent decision to contribute its Compute Express Link (CXL) interconnect technology as an industry open standard for high-speed communications was a grenade lobbed into the middle of an escalating turf war, its decision to join forces with nine technology industry giants to support that standard drew a new set of battle lines.

CXL, a high-speed CPU interconnect for moving data rapidly among computer processors and other components in large datacenters, had been in development at Intel for about four years. The company debuted version 1.0 in early March, and then announced that it would open the tech and support its development under the auspices of a new industry standards group. The CXL specification is now available to any company that joins the group.

The roster of CXL Consortium founders includes (along with Intel) Microsoft, Google, Facebook, Cisco, Dell EMC, Hewlett Packard Enterprise, Huawei and Alibaba. The group is expected to incorporate later this year. Conspicuously absent from that list: Nvidia, AMD, Amazon and ARM.

Microsoft signed on as a founding member "to drive the development of new industry bus standards to enable future generations of cloud servers." Facebook wants to "to enable and foster a standards-based open accelerator ecosystem for efficient and advanced next generation systems." Alibaba joined "to support the global development and open collaboration of the CXL ecosystem."

"It's incredible to see the caliber of companies that came together to form the consortium for CXL," said Navin Shenoy, executive vice president and general manager of Intel's Data Center Group, in a blog post. "They represent the leaders in data center, communications infrastructure, and cloud computing and services -- and we expect more companies to join in the coming future to contribute to the next iteration of this spec."

The first-generation specification will be available to consortium members in the first half of this year, Shenoy said, and he expects to see products that incorporate CXL technology appearing in Intel's 2021 datacenter platforms.

CXL 1.0 enables a fast and efficient interconnect between the CPU and various platform enhancements and workload accelerators, such as GPUs, FPGAs and other purpose-built accelerator solutions, Shenoy explained. Importantly, CXL maintains memory coherence among the devices, which allows resource sharing for higher performance, reduced software stack complexity and lower overall system cost.

Memory coherence is one of CXL's critical capabilities. As Intel Fellow Debendra Das Sharma explained it a recently published whitepaper:

CXL maintains a unified, coherent memory space between the CPU (host processor) and any memory on the attached CXL device. This allows both the CPU and device to share resources for higher performance and reduced software stack complexity. Moreover, since the CPU is primarily responsible for coherency management, it can reduce device cost and complexity, as well as overhead traditionally associated with coherency across an I/O link.

High-speed interconnects have become critical components in datacenters struggling to cope with the growing demands of an expanding catalog of AI- and machine learning-driven applications.

"The explosion of data and rapid innovation in specialized workloads -- like compression, encryption and artificial intelligence (AI) -- have given rise to heterogeneous computing, where purpose-built accelerators work side-by-side with general-purpose CPUs," Shenoy said. "These accelerators need a high-performance connection to the processor, and, ideally, they share a common memory space to reduce overhead and latency."

The industry has been clamoring for a replacement for the long-in-the-tooth standard, PCIe 3.0. Even as its successor, PCIe 4.0, is set to ship in new servers later this year, it's already adopting PCIe 5.0, which doubles the throughput of its predecessor. In fact, CXL is built on PCIe 5.0.

"CXL is an important milestone for data-centric computing, and will be a foundational standard for an open, dynamic accelerator ecosystem," said Jim Pappas, Intel's director of technology initiatives, in a statement. "Like USB and PCI Express, which Intel also co-founded, we can look forward to a new wave of industry innovation and customer value delivered through the CXL standard."

Meanwhile, the market isn't standing still. The list of competitive solutions in this space currently includes Nvidia's NVLink high-speed GPU interconnect, as well as CCIX, OpenCAPI and Gen-Z, all of which have their own standards organizations.

And yet, because CXL is an open standard, even its competitors are making supportive noises -- for example, the Gen-Z Consortium's Kurtis Bowman, who said in a statement: "As a Consortium founded to encourage an open ecosystem for the next-generation memory and compute architectures, Gen-Z welcomes Compute Express Link (CXL) to the industry and we look forward to opportunities for future collaboration between our organizations."

"We are encouraged to see the true openness of CXL," said Robert Hormuth, vice president and CTO of Dell EMC's Server and Infrastructure Systems group, "and look forward to more industry players joining this effort. The synergy between CXL and Gen-Z is clear, and both will be important components in supporting Dell EMC's kinetic infrastructure and this data era."

About the Author

John has been covering the high-tech beat from Silicon Valley and the San Francisco Bay Area for nearly two decades. He serves as Editor-at-Large for Application Development Trends ( and contributes regularly to Redmond Magazine, The Technology Horizons in Education Journal, and Campus Technology. He is the author of more than a dozen books, including The Everything Guide to Social Media; The Everything Computer Book; Blobitecture: Waveform Architecture and Digital Design; John Chambers and the Cisco Way; and Diablo: The Official Strategy Guide.


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